Hardware-in-the-loop testing and analysis of rapid voltage injection on transmission lines using modular SSSC with line distance protection security considerationsPolajžer, Boštjan (Avtor) Černelič, Jernej (Avtor) Kerin, Uroš (Avtor) Hrovat, Gorazd (Avtor) static synchronous series compensatorFACTSprotection-in-the-loopdistance protectionBosanskohercegovački komitet CIGRÉ20252025-12-01 13:59:20Članek v reviji96085UDK: 621.311COBISS_ID: 258890755DOI: 10.2478/bhee-2025-0012ISSN pri članku: 2566-3151sl© 2025 Boštjan Polajžer, Jernej Černelič, Uroš Kerin, Gorazd Hrovat