20.500.12556/DKUM-38079 ENOTA ZA BLAŽENJE NAPAK V VISOKO ZANESLJIVIH VGRAJENIH SISTEMIH ERROR MITIGATION UNIT FOR USE IN HIGH RELIABILITY EMBEDDED SYSTEMS V diplomski nalogi je opisan razvoj in uporaba enote za blaženje napak za uporabo v visoko zanesljivih vgrajenih sistemih. Enota je bila razvita s poudarkom na uporabi v uporabniško programiranih poljih logičnih vrat v strojno opisnem jeziku verilog. Različni kodi za popravljanje napak so opisani in primerjani, vključno z možnimi načini njihove realizacije v digitalnih vezjih. Pravilno delovanje enote za blaženje napak je bilo preverjeno, prav tako so bili določeni pogoji za njeno uporabo. This diploma work describes the development of an error mitigation unit for use in high reliability embedded systems. The unit was developed in verilog, a hardware description language, with an emphasis on its use in field-programmable gate arrays. Various error correcting codes were compared and contrasted as well as methods for their realization in digital circuits. Tests which established the correctness of the error mitigation unit were performed. Constraints for its use were also determined. vgrajeni sistemi blaženje napak FPGA strojno opisni jezik Hammingov kod embedded systems error mitigation FPGA HDL Hamming code true true false [D. Selčan] Slovenski jezik Angleški jezik Diplomsko delo 2012-09-17 11:07:32 2012-11-16 12:46:32 2022-04-25 23:09:49 2021-04-17 03:27:30 2012 0 Maribor 0 0000-00-00 NiDoloceno NiDoloceno NiDoloceno 0000-00-00 0000-00-00 0000-00-00 621.38:753.1.7(043.2) 16478742 URN:SI:UM:DK:VWRW0V35 UNI_Selcan_David_2012.pdf UNI_Selcan_David_2012.pdf 1 B535CE76C7E9C44593702B9806CE507D b67886305888d43773af556c5fe635dbb1497c158f925e663c968bc89715d369 690e1099-7c08-11eb-bb7a-00155d0001ca 20.500.12556/dkum/247dba23-74a1-4e9c-92e3-dd17c7f600c3 https://dk.um.si/Dokument.php?lang=slv&id=50623 Fakulteta za elektrotehniko, računalništvo in informatiko 0 0 0