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Title:Snovanje naprave za merjenje uhajavih tokov katodnih odvodnikov v visokonapetostnih omrežjih : magistrsko delo
Authors:ID Bat, Dario (Author)
ID Truntič, Mitja (Mentor) More about this mentor... New window
ID Belšak, Aleš (Mentor) More about this mentor... New window
Files:.pdf MAG_Bat_Dario_2023.pdf (3,44 MB)
MD5: E1D89769FAA85547C7B3CDB296E03ED9
 
.zip MAG_Bat_Dario_2023.zip (55,61 MB)
MD5: 65421CC551A13D328AE7B472B8885E7D
 
Language:Slovenian
Work type:Master's thesis/paper
Typology:2.09 - Master's Thesis
Organization:FERI - Faculty of Electrical Engineering and Computer Science
Abstract:V nalogi je razdelan problem merjenja uhajavih tokov, ki se pojavijo pri katodnih odvodnikih na visokonapetostnih omrežjih. Uhajave toke merimo, da dobimo sliko napetosti in pri tem zaznamo, kakšno je gibanje električnih velikosti v omrežju. Velikosti napetosti pri visokonapetostnih omrežjih so od 36 kV in na več, zato je takšne velikosti zelo težko meriti na konvencionalne načine. Pri predlaganem načinu merjenja se tok skozi katodni odvodnik »pretvori v vrednosti maksimalno 1 do 2 mA pri pritisnjeni napetosti od 36 kV. Nadalje se pridobljeni signal obdela skozi ADC pretvornik in določene vrednosti napetosti za meritev toka pridobijo vrednost med 0 in 3 V. Da bi metoda bila uspešna, je treba meriti vsaj 200 točk v eni polperiodi signala. Pridobljeni rezultati se obdelajo na procesorju, in če so meritve ustrezne, se enkrat dnevno pošlje informacija, ali je signal ustrezen (v dovoljenih mejah). S takšnimi podatki iz merilnika nadalje lahko opazujemo tudi stanje odvodnika in ga po potrebi zamenjamo oz. pustimo nespremenjenega, če so vrednosti zadovoljive.
Keywords:tiskano vezje, dizajn, merjenje, komunikacija, optimizacija
Place of publishing:Maribor
Place of performance:Maribor
Publisher:[D. Bat]
Year of publishing:2023
Number of pages:1 spletni vir (1 datoteka PDF (X, 63 f.))
PID:20.500.12556/DKUM-83606 New window
UDC:681.5.08:621.014.6(043.2)
COBISS.SI-ID:148614403 New window
Publication date in DKUM:30.01.2023
Views:777
Downloads:84
Metadata:XML DC-XML DC-RDF
Categories:KTFMB - FERI
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Licences

License:CC BY-NC-ND 4.0, Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International
Link:http://creativecommons.org/licenses/by-nc-nd/4.0/
Description:The most restrictive Creative Commons license. This only allows people to download and share the work for no commercial gain and for no other purposes.
Licensing start date:10.01.2023

Secondary language

Language:English
Title:Design of a device for measuring leakage currents of surge arresters in high voltage networks
Abstract:The thesis deals with the problem of measuring leakage currents that occur in surge arresters on high voltage networks. Leakage currents are measured to obtain the information about the voltage and to detect the variation of electrical quantities in the network. Voltage sizes for high-voltage networks range around 36kV and up and such sizes are very difficult to measure in conventional ways. In the proposed measurement method, the current through the cathode arrester is transformed to a maximum of 1 to 2 mA at a voltage of 36 kV. Furthermore, the obtained signal is processed through an AD converter and certain current values obtain a hair value voltage between 0 and 3V. For the method to be successful, it is necessary to measure at least 200 points in one half-cycle of the signal. The obtained results are processed on the processor and if the measurements are adequate, an information if the signal is within the required range is sent once a day. With such data from the device, we can further observe the condition of the arrester and replace it if necessary or leave in operation if the values are sufficient.
Keywords:PCB, design, measuring, communication, optimization


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