| Title: | Hardware-in-the-loop testing and analysis of rapid voltage injection on transmission lines using modular SSSC with line distance protection security considerations |
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| Authors: | ID Polajžer, Boštjan (Author)
ID Černelič, Jernej (Author)
ID Kerin, Uroš (Author)
ID Hrovat, Gorazd (Author) |
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| Files: |  Hardware-In-The-Loop_Testing_and_Analysis_of_Rapid_Voltage_Injection_on_Transmission_Lines_Using_Mod_(1).pdf (1,08 MB)
MD5: E492CBEC61358DF8493FE6C29C3C3502
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| Language: | English |
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| Work type: | Article |
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| Typology: | 1.01 - Original Scientific Article |
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| Organization: | FERI - Faculty of Electrical Engineering and Computer Science
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| Keywords: | static synchronous series compensator, FACTS, protection-in-the-loop, distance protection |
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| Publication status: | Published |
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| Publication version: | Version of Record |
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| Submitted for review: | 19.11.2024 |
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| Article acceptance date: | 11.03.2025 |
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| Publication date: | 16.11.2025 |
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| Publisher: | Bosanskohercegovački komitet CIGRÉ |
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| Year of publishing: | 2025 |
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| Number of pages: | 6 str. |
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| Numbering: | Vol. 19, iss. 2 |
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| PID: | 20.500.12556/DKUM-96085  |
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| UDC: | 621.311 |
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| ISSN on article: | 2566-3151 |
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| COBISS.SI-ID: | 258890755 |
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| DOI: | 10.2478/bhee-2025-0012 |
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| Copyright: | © 2025 Boštjan Polajžer, Jernej Černelič, Uroš Kerin, Gorazd Hrovat
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| Publication date in DKUM: | 01.12.2025 |
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| Views: | 232 |
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| Downloads: | 8 |
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| Metadata: |    |
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| Categories: | Misc.
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