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Title:ENOTA ZA BLAŽENJE NAPAK V VISOKO ZANESLJIVIH VGRAJENIH SISTEMIH
Authors:ID Selčan, David (Author)
ID Kramberger, Iztok (Mentor) More about this mentor... New window
Files:.pdf UNI_Selcan_David_2012.pdf (2,19 MB)
MD5: B535CE76C7E9C44593702B9806CE507D
PID: 20.500.12556/dkum/247dba23-74a1-4e9c-92e3-dd17c7f600c3
 
Language:Slovenian
Work type:Undergraduate thesis
Typology:2.11 - Undergraduate Thesis
Organization:FERI - Faculty of Electrical Engineering and Computer Science
Abstract:V diplomski nalogi je opisan razvoj in uporaba enote za blaženje napak za uporabo v visoko zanesljivih vgrajenih sistemih. Enota je bila razvita s poudarkom na uporabi v uporabniško programiranih poljih logičnih vrat v strojno opisnem jeziku verilog. Različni kodi za popravljanje napak so opisani in primerjani, vključno z možnimi načini njihove realizacije v digitalnih vezjih. Pravilno delovanje enote za blaženje napak je bilo preverjeno, prav tako so bili določeni pogoji za njeno uporabo.
Keywords:vgrajeni sistemi, blaženje napak, FPGA, strojno opisni jezik, Hammingov kod
Place of publishing:Maribor
Publisher:[D. Selčan]
Year of publishing:2012
PID:20.500.12556/DKUM-38079 New window
UDC:621.38:753.1.7(043.2)
COBISS.SI-ID:16478742 New window
NUK URN:URN:SI:UM:DK:VWRW0V35
Publication date in DKUM:16.11.2012
Views:1875
Downloads:213
Metadata:XML DC-XML DC-RDF
Categories:KTFMB - FERI
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Secondary language

Language:English
Title:ERROR MITIGATION UNIT FOR USE IN HIGH RELIABILITY EMBEDDED SYSTEMS
Abstract:This diploma work describes the development of an error mitigation unit for use in high reliability embedded systems. The unit was developed in verilog, a hardware description language, with an emphasis on its use in field-programmable gate arrays. Various error correcting codes were compared and contrasted as well as methods for their realization in digital circuits. Tests which established the correctness of the error mitigation unit were performed. Constraints for its use were also determined.
Keywords:embedded systems, error mitigation, FPGA, HDL, Hamming code


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